Renesas Electronics 9DB102BGILF, LVDS Buffer Dual TTL Buffer, 20-Pin TSSOP
- RS Stock No.:
- 217-7928
- Mfr. Part No.:
- 9DB102BGILF
- Manufacturer:
- Renesas Electronics
Bulk discount available
Subtotal (1 tube of 74 units)*
SGD348.096
(exc. GST)
SGD379.398
(inc. GST)
FREE delivery for orders over $150, or create a business account to enjoy free delivery from just $28
Temporarily out of stock
- 74 left, ready to ship from another location
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Units | Per unit | Per Tube* |
|---|---|---|
| 74 - 74 | SGD4.704 | SGD348.10 |
| 148 - 222 | SGD4.586 | SGD339.36 |
| 296 - 444 | SGD4.472 | SGD330.93 |
| 518 - 962 | SGD4.36 | SGD322.64 |
| 1036 + | SGD4.251 | SGD314.57 |
*price indicative
- RS Stock No.:
- 217-7928
- Mfr. Part No.:
- 9DB102BGILF
- Manufacturer:
- Renesas Electronics
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Number of Drivers | 2 | |
| Input Type | TTL | |
| Output Type | Buffer | |
| Number of Elements per Chip | 2 | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Number of Drivers 2 | ||
Input Type TTL | ||
Output Type Buffer | ||
Number of Elements per Chip 2 | ||
Package Type TSSOP | ||
Pin Count 20 | ||
The Renesas Electronics 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.
2 - 0.7 V HCSL differential output pairs
Phase jitter: PCIe Gen2 < 3.1 ps rms
Phase jitter: PCIe Gen1 < 86 ps peak to peak
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
33-110 MHz operation in PLL mode
10-110 MHz operation in Bypass mode
Phase jitter: PCIe Gen2 < 3.1 ps rms
Phase jitter: PCIe Gen1 < 86 ps peak to peak
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
33-110 MHz operation in PLL mode
10-110 MHz operation in Bypass mode
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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