Xilinx FPGA XC2S200-5PQG208C, Spartan-II 5292 Cells, 200000 Gates, 75264bit, 1176 Blocks, 208-Pin PQFP
- RS Stock No.:
- 626-0472P
- Mfr. Part No.:
- XC2S200-5PQG208C
- Manufacturer:
- Xilinx
Bulk discount available
Subtotal 20 units (supplied in a tray)*
SGD1,539.20
(exc. GST)
SGD1,677.80
(inc. GST)
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Units | Per unit |
|---|---|
| 20 - 49 | SGD76.96 |
| 50 - 99 | SGD74.10 |
| 100 - 249 | SGD71.26 |
| 250 + | SGD68.40 |
*price indicative
- RS Stock No.:
- 626-0472P
- Mfr. Part No.:
- XC2S200-5PQG208C
- Manufacturer:
- Xilinx
Specifications
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Xilinx | |
| Family Name | Spartan-II | |
| Number of Logic Gates | 200000 | |
| Number of Logic Cells | 5292 | |
| Number of Logic Units | 1176 | |
| Mounting Type | Surface Mount | |
| Package Type | PQFP | |
| Pin Count | 208 | |
| Number of RAM Bits | 75264bit | |
| Dimensions | 28 x 28 x 3.4mm | |
| Height | 3.4mm | |
| Length | 28mm | |
| Minimum Operating Supply Voltage | 2.375 V | |
| Maximum Operating Temperature | +85 °C | |
| Width | 28mm | |
| Minimum Operating Temperature | 0 °C | |
| Maximum Operating Supply Voltage | 2.625 V | |
| Select all | ||
|---|---|---|
Brand Xilinx | ||
Family Name Spartan-II | ||
Number of Logic Gates 200000 | ||
Number of Logic Cells 5292 | ||
Number of Logic Units 1176 | ||
Mounting Type Surface Mount | ||
Package Type PQFP | ||
Pin Count 208 | ||
Number of RAM Bits 75264bit | ||
Dimensions 28 x 28 x 3.4mm | ||
Height 3.4mm | ||
Length 28mm | ||
Minimum Operating Supply Voltage 2.375 V | ||
Maximum Operating Temperature +85 °C | ||
Width 28mm | ||
Minimum Operating Temperature 0 °C | ||
Maximum Operating Supply Voltage 2.625 V | ||
- COO (Country of Origin):
- US
Field Programmable Gate Arrays, Xilinx
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.