Nexperia 74HCT373D,652 D Type Latch, 8-Bit Non-Inverting, 20-Pin SO
- RS Stock No.:
- 170-8071
- Mfr. Part No.:
- 74HCT373D,652
- Manufacturer:
- Nexperia
Stock information currently inaccessible
- RS Stock No.:
- 170-8071
- Mfr. Part No.:
- 74HCT373D,652
- Manufacturer:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Family | 74HCT | |
| Product Type | D Type Latch | |
| Logic Function | D Type | |
| Number of Channels | 8 | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | SO | |
| Minimum Supply Voltage | 4.5V | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 5.5V | |
| Input Level | TTL | |
| Maximum Propagation Delay Time @ CL | 45ns | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Series | 74HCT | |
| Height | 2.45mm | |
| Length | 13mm | |
| Automotive Standard | No | |
| Output Type | 3 State | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Family 74HCT | ||
Product Type D Type Latch | ||
Logic Function D Type | ||
Number of Channels 8 | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type SO | ||
Minimum Supply Voltage 4.5V | ||
Pin Count 20 | ||
Maximum Supply Voltage 5.5V | ||
Input Level TTL | ||
Maximum Propagation Delay Time @ CL 45ns | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Series 74HCT | ||
Height 2.45mm | ||
Length 13mm | ||
Automotive Standard No | ||
Output Type 3 State | ||
The 74HC373: 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to Interface inputs to voltages in excess of VCC.
Low switch leakage
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