Cypress Semiconductor, CY23EP05SXI-1H

Technical data sheets
Legislation and Compliance
RoHS Certificate of Compliance
Product Details

The -1H version operates up to 220 (200) MHz frequencies at 3.3 V (2.5 V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The phase-locked loop (PLL) feedback is on-chip and is obtained from the CLKOUT pad. There are two banks of four outputs each, which can be controlled by the Select inputs. If all output clocks are not required, Bank B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The PLL enters a power-down mode when there are no rising edges on the REF input (less than ∼2 MHz). In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25 μA of current draw. In the special case when S2:S1 is 1:0, the PLL is bypassed and REF is output from DC to the maximum allowable frequency. The part behaves like a non-zero delay buffer in this mode, and the outputs are not tri-stated.

Specifications
Attribute Value
Number of Elements per Chip 1
Maximum Supply Current 30 mA, 45 mA
Maximum Input Frequency 220MHz
Mounting Type Surface Mount
Package Type SOIC
Pin Count 8
Dimensions 4.97 x 3.98 x 1.47mm
Length 4.97mm
Width 3.98mm
Height 1.47mm
Maximum Operating Supply Voltage 3.6 V
Maximum Operating Temperature +85 °C
Maximum Output Frequency 220MHz
Minimum Operating Supply Voltage 3 V
Minimum Output Frequency 10MHz
Minimum Operating Temperature -40 °C
Temporarily out of stock - back order for despatch 28/10/2020, delivery within 4 working days from despatch date
Price Each (In a Tube of 97)
Was SGD20.286
SGD 16.045
(exc. GST)
SGD 17.168
(inc. GST)
units
Per unit
Per Tube*
97 - 194
SGD16.045
SGD1,556.365
291 - 485
SGD15.483
SGD1,501.851
582 - 970
SGD14.709
SGD1,426.773
1067 +
SGD13.973
SGD1,355.381
*price indicative
Related Products
The Silicon Labs Si5334x family are LVDS Fanout ...
Description:
The Silicon Labs Si5334x family are LVDS Fanout Clock Buffers that offer low jitter characteristics of 50 fs and feature built in LDOs for high PSRR performance. Ultra-low additive jitter: 50 fs RMSBuilt-in LDOs for high PSRR performance and a ...
The CY22393, CY22394, and CY22395 are a family ...
Description:
The CY22393, CY22394, and CY22395 are a family of parts designed as upgrades to the existing CY22392 device. These parts have similar performance to the CY22392, but provide advanced features to meet the needs of more demanding applications. The clock ...
The CY2292 is a third-generation family of clock ...
Description:
The CY2292 is a third-generation family of clock generators. The CY2292 is upwardly compatible with the industry standard ICD2023 and ICD2028 and continues their tradition by providing a high level of customizable features to meet the diverse clock generation needs ...
The CY2304 is a 3.3 V zero delay ...
Description:
The CY2304 is a 3.3 V zero delay buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip phase-locked loop (PLL) that locks to an input clock presented on ...