Cypress Semiconductor, CY2309SXC-1

Technical data sheets
Legislation and Compliance
RoHS Certificate of Compliance
Product Details

The CY2309 is a low-cost 3.3 V zero delay buffer designed to distribute high speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low skew clocks. The -1H versions of each device operate at up to 100-/133 MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2309 has two banks of four outputs each, which can be controlled by the select inputs. If all output clocks are not required, Bank B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The CY2305 and CY2309 PLLs enter a power-down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25.0 μA current draw for these parts.

Specifications
Attribute Value
Number of Elements per Chip 1
Maximum Supply Current 32 mA
Maximum Input Frequency 133MHz
Mounting Type Surface Mount
Package Type TSSOP
Pin Count 16
Dimensions 5.1 x 4.5 x 0.95mm
Length 5.1mm
Width 4.5mm
Height 0.95mm
Maximum Operating Supply Voltage 3.6 V
Maximum Operating Temperature +70 °C
Maximum Output Frequency 133.3MHz
Minimum Operating Supply Voltage 3 V
Minimum Operating Temperature 0 °C
Minimum Output Frequency 10MHz
Stock check temporarily unavailable - call for stock availability
Price Each (In a Tube of 48)
SGD 9.584
(exc. GST)
SGD 10.255
(inc. GST)
units
Per unit
Per Tube*
48 - 48
SGD9.584
SGD460.032
96 - 96
SGD9.268
SGD444.864
144 - 240
SGD8.905
SGD427.44
288 - 480
SGD8.436
SGD404.928
528 +
SGD7.68
SGD368.64
*price indicative
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