ON Semiconductor NB7V33MMNGEVB, Clock Divider Evaluation Board for NB7V33MMNG

Technical data sheets
Legislation and Compliance
RoHS Certificate of Compliance
Product Details

The NB7V33M is a differential divide by 4 Clock divider with asynchronous reset. The differential Clock inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML and LVDS logic levels. The NB7V33M produces a div 4 output copy of an input Clock operating up to 10GHz with minimal jitter. The Reset pin is asserted on the rising edge. Upon powerup, the internal flip-flops will attain a random state. The Reset allows for the synchronization of multiple NB7V33Ms in a system. The 16mA differential CML output provides matching internal 50-ohm termination which provides 400mV output swing when externally receiver terminated with 50-ohm to VCC.

Clock Divider
ATE, Instrumentation

Specifications
Attribute Value
Clock/Timer Function Clock Divider
Kit Classification Evaluation Board
Featured Device NB7V33MMNG
Discontinued product
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